Sandia is using formal methods in anger on production hardware designs. Sandia is uniquely situated to apply formal methods in our hardware design pipeline; we design, synthesize, and fabricate our ASICs ourselves. We also \emph{need} formal guarantees, Sandia’s always/never requirements are more stringent than all but the most critical systems in industry. This paper gives a brief overview of Sandia’s needs, current SMT based workflows and our intended move to correct by construction design.
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Tianrui Wei University of California, Berkeley, Shangyin Tan University of California at Berkeley, Koushik Sen University of California at Berkeley, Krste Asanovic University of California Berkeley